Fast Local Scrubbing for FPGAs

Memory scrubbing is used to mitigate SEU on susceptible devices. In the case of FPGAs, configuration memory scrubbing is generally used in conjunction with triple modular redundancy (TMR) to increase the reliability of FPGA systems in space borne applications. Reported solutions require a subsystem able to read and write from the configuration memory and retrieve from a “safe storage” a golden bitstream for scrubbing whenever an error is detected. An alternative to this solution is to implement error detection and correction codes. These codes usually require data to be embedded within the data that is being protected, which is particularly difficult in the case of a configuration bitstream since it is automatically created by CAD tools. In this paper we present an alternative error correction and detection implementation that overcomes such difficulties and allows fast local scrubbing without the need of storing a golden bitstream somewhere safe. This implementation is a processing peripheral tied to a scrubber -labeled Femtocurrently being implemented in a RHBD S-ASIC.